ASML and TSMC Achieve EUV Milestone by Fabricating 1000 Wafers in 24 hours
TSMC recently achieved a landmark goal by using an EUV scanner to produce more than 1000 wafers. The wafers were manufactured by using the NXE:3300B system past ASML property and was washed during the duration of exactly one day. EUV or Extreme Ultra Violet lithography is the next stride in fabricating wafers and this is an extremely promising sign for the leading third party foundry.
A stock photograph of TSMC @ TSMC Public Domain
Landmark Milestone achieved at TSMC - 1022 wafers produced under EUV litho
TSMC already has two such systems in their foundry and plans to add equally many every bit 2 more for the targeted output of 1000 wafers per day (sustained) at much higher than xc Watts. With the proper redundancies in identify, TSMC admitted that the route to manufacturing below 10nm was now inside grasp. Intel has already expressed its plans to use EUV scanners for less than 10nm (although to be honest, they have been saying that ever since the 45nm node). Now here is the thing, the scanners are currently operating at 90W power, by next year they will be replaced with 3350B models running at 125W, ideally the factories should be capable of 250W production by 2022 - the time frame nosotros now see for EUV at TSMC.
"During a recent test run on an NXE:3300B EUV arrangement nosotros exposed 1022 wafers in 24 hours with sustained power of over 90 Watts," said Dr. Anthony Yen, R&D Director, TSMC, at the 2022 SPIE Advanced Lithography Symposium. "Nosotros are pleased with this upshot, as it shows us the potential of the system."
Some of you might exist wondering why TSMC needs iv scanners if they require a targeted output of 1000 wafers per day. Affair is, the electric current system, while it produced 1022 wafers per mean solar day to be exact, would have reduced to just ~400 wafers or so if left running for 3-iv not to mention broken downwardly after that. So while this press release is naturally quite optimistic in nature, the reality of fabricating at such bleeding border is quite harsh - just ask Intel. For now, Intel comfortably maintains its pb over the procedure industry although a bottleneck in the shrinking pattern is approaching - meaning the scenario in which Intel looses or drastically shortens its lead is very much a possibility now.
Source: https://wccftech.com/asml-tsmc-achieve-euv-milestone/
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